信号完整性研发测试攻略2.0 - 图文

信号完整性测试指导书 钱媛 宋明全康钦山 sam Huang) Tracy Qian) Ivan Song)

Scott Kang)

——Ver 2.0

编写:黄如俭 ( ( ( (目录

1. CLK Test....................................................................................................................... 3

1.1 Differential Signal Test........................................................................................ 3 1.2 Single Signal Test ............................................................................................... 5 2. LPC Test ....................................................................................................................... 7

2.1 EC Side Test....................................................................................................... 7 2.2 Control Sidse Test ............................................................................................ 8 3. USB Test......................................................................................................................11

3.1 High Speed Test.................................................................................................11 3.2 Low Speed Test ................................................................................................ 12 3.3 Full Speed Test ................................................................................................. 12 3.4 Drop/Droop Test ............................................................................................... 12 4. VGA Test .................................................................................................................... 14

4.1 R、G、B Signal Test ....................................................................................... 14

4.2 RGB Channel to Channel Skew Test.................................................................... 14 4.3 VSYNC and HSYNC Test.................................................................................. 15 4.4 DDC_DATA and DDC_CKL Test ....................................................................... 15 5. LVDS Test................................................................................................................... 17

5.1 Differential data signals swing Test .................................................................... 17

5.2 Checking Skew at receiver Test .......................................................................... 18 5.3 Checking the offset voltage Test ......................................................................... 19 5.4 Differential Input Voltage Test ........................................................................... 20 5.5 Common Mode Voltage Test .............................................................................. 20 5.6 Slew Rate Test.................................................................................................. 21 5.7 Data to Clock Timing Test ................................................................................. 23 6. FSB Test ..................................................................................................................... 26 7. Serial Data(SATA/ESATA, PCIE, DMI,FDI) Test ....................................................... 29 8. HD Audio Test ............................................................................................................. 30

8.1 Measurement at The Controller ........................................................................... 30 8.2 Measurement at The Codec.............................................................................. 31 9. DDR2 Test .................................................................................................................. 34

9.1 Clock .............................................................................................................. 34 9.2 Write ............................................................................................................... 35 9.3 Read................................................................................................................ 37 10.Ethernet Test ............................................................................................................... 39 11.SMbus Signal Test ....................................................................................................... 40 12. HDMI Test ................................................................................................................ 42 13. DisplayPort Test ......................................................................................................... 43

1. CLK Test

1.1 Differential Signal Test

测试设备:

示波器,两个差分探头,鼠标,键盘 测试软件:

3D MARK,负载

测试步骤:

(1)开启示波器预热30分钟,运行测试软件。连接差分探头,鼠标,和键盘。对示波器的probes和channals进行calibration和deskew。

(2)参照测试平台的芯片datasheet,使用Allegro SPB软件,在电路板上找出被测信号测试点,记录下过孔或芯片管脚的位置。找出待测信号接收端的参数标准。如图1.1

图1.1

(3)连接电路板的附属小板,显示屏,电源,将示波器和电路板共地。开启电路板,正常进入系统,运行3D Mark。

(4)参照被测信号测试标准,在示波器(Agilent )的菜单选项中选择对应的测试项Frequency/Period/ Duty Cycle/High Time/ Low Time/cyc-cyc-jitter .

Spec中有约束条件的要进行条件设置。如图1.2

图1.2

(5)用一个差分探头连接差分信号测试点,调节示波器,抓取所需要的波形,并保存。 (6)清除之前的测试选项和波形。再次从菜单选项中选择测试项。 Rise time/Fall time/Overshoot/Undershoot/High level/Low level

(7)根据测试标准的要求,选择相应的探头。如果要求使用单端探头,将探头的“+”端接信号测试点,“-”端接地;如果要求使用差分探头,将探头连接差分信号的两个测试点,调节示波器,抓取所需要的波形,并保存。

(8)Vcross的测试:

a.用两个单端探头的“+”极分别连接clk信号的P/N极,“—”极连接差分信号测试

点最近的地。在同一屏幕上显示两个通道的波形,调整参数使两个通道的OFFSET,单位幅值相同,抓取密集波形。调出marker,用两条横向的坐标分别卡出两条信号线交点(同一信号相同的边沿)的最大值和最小值。如图1.3

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