10. coating of the wafers with photoresist
11 Exposure of the photoresist with the DIMPLES mask 12. Developing the exposed photoresist to create the desired etch mask for subsequent pattern
13. the 1st oxide layer is then etched in an RIE system to form dimples
14. After etch, the photoresist is chemically stripped in a solvent bath.
The depth of the dimples is 750 nm
上述五步重复了前一次的过程，是表面微机械加工最典型的工艺循环
15.-19 The wafers are then patterned with the third mask layer, ANCHOR1, and reactive ion etched. This step provides anchor holes that will be filled by the Poly 1 layer.
第一层牺牲层经历了两次加工，为什么不一次完成？还有其它的技术途径选择吗？
20. the first structural layer of polysilicon (Poly 1) is deposited at a thickness of 2.0 μm.
21. A thin (200 nm) layer of PSG is deposited over the polysilicon
dimples 处的高度会有起伏，这里未有表达。
22. the wafer is annealed at 1050°C for 1 hour，
The anneal dopes the polysilicon with phosphorus from the PSG layers both above and below it.
The anneal also serves to significantly reduce the net stress in the Poly 1 layer.
（为什么从两侧同时扩散掺杂？）
23－27 The polysilicon (and its PSG masking layer) is lithographically patterned using a mask designed to form the first structural layer POLY1.（涂胶－光刻－显影－RIE刻蚀－
去胶）
刻蚀PSG和氮化硅的工艺参数不同，且有选择性，尤其应当注意 通常PSG充当氮化硅刻蚀的硬掩膜，可以实现良好图形转移效果。
28.以RIE刻蚀清除表面的残余PSG （可以不去吗？）
29. The second PSG layer (Second Oxide) is deposited（0.75μm）
30－34 The POLY1_POLY2_VIA level provides for etch holes in the Second Oxide down to the Poly 1 layer. This provide a mechanical and electrical connection between the Poly 1 and Poly 2 layers.（部分清除第二层氧化硅以使即将沉积的第二层硅
与第一层硅结合，同样经历涂胶－光刻－显影－RIE刻蚀－去胶循环）
35-39.同样循环操作开出贯通上下的通孔，为制作固定连接的轴套留出空间
（为什么要一次性刻穿第一第二层牺牲层？刻蚀终止于第一层硅可以吗？）
40. The second structural layer, Poly 2, is then deposited (1.5 μm thick)
41. the deposition of 200 nm PSG. On the top of POLY2