²¢ËµÃ÷ÕâÒ»¹¦ÄܵÄÌØµã¼°ÓÅÊÆ¡£P113~114
4-14 ¶ÔÀý3-23ºÍÀý3-24½øÐзÂÕæ£¬ÑéÖ¤Æä¹¦ÄÜ£¬²¢Ïêϸ˵Ã÷³ÌÐò½á¹¹ºÍ¸÷Óï¾ä¹¦ÄÜ¡£ÊÔÓýø³ÌÓï¾äÍê³ÉÏàͬ¹¦ÄÜ¡£
--½â1£º4-14¡¾Àý3-23¡¿0¡«255·¶Î§ÄÚµÄ×ÔÈ»Êýת»»³É8λ¶þ½øÖÆÊý¡£ LIBRARY IEEE; --Ö÷³ÌÐò£¬Óû§¶¨Òåת»»º¯ÊýÓ¦ÓÃʵÀý USE IEEE.STD_LOGIC_1164.ALL; USE WORK.n_pack.ALL; ENTITY axamp IS
PORT(dat: IN nat; --×¢ÒâÊý¾ÝÀàÐ͵͍Òå ou: OUT Bit8); --×¢ÒâÊý¾ÝÀàÐ͵͍Òå END;
ARCHITECTURE bhv OF axamp IS BEGIN
ou<=nat_to_Bit8(dat); END; --½â2£º4-14¡¾Àý3-24¡¿×ÔÈ»Êýת»»³É¶þ½øÖÆÊýµÄ³ÌÐò°ü(²»ÄܶÀÁ¢×ۺϷÂÕæ¡£±»¡¾Àý3-23¡¿´ò¿ªÊ¹ÓÃ)
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL; PACKAGE n_pack IS
SUBTYPE nat IS Integer range 0 to 255;--¶¨ÒåÒ»¸öIntegerµÄ×ÓÀàÐÍ TYPE Bit8 IS array(7 downto 0)OF std_logic;--¶¨ÒåÒ»¸öÊý¾ÝÀàÐÍ FUNCTION nat_to_Bit8(s:nat)RETURN Bit8; END n_pack;
PACKAGE BODY n_pack IS
FUNCTION nat_to_Bit8(s:nat)RETURN Bit8 IS VARIABLE Din: Integer range 255 downto 0; VARIABLE Rut: Bit8;
VARIABLE Rig: Integer:=2**7; BEGIN Din:=S;
FOR I in 7 downto 0 LOOP
IF Din/Rig > 0 THEN Rut(i):='1';Din:=Din-Rig; ELSE Rut(i):='0'; END IF; Rig:=Rig/2; END LOOP; RETURN Rut; END nat_to_Bit8; END n_pack;
5 ϰ Ìâ
5-1 ÔÚVHDLÉè¼ÆÖУ¬¸øÊ±Ðòµç·Çå0(¸´Î»)ÓÐÁ½ÖÖ²»Í¬·½·¨£¬ËüÃÇÊÇʲô?ÈçºÎʵÏÖ?ͬ²½ºÍÒì²½¸´Î»¡£P122~124
--½â1£º5-1¡¾Àý5-4¡¿º¬Òì²½¸´Î»ºÍʱÖÓʹÄܵÄD´¥·¢Æ÷
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL; ENTITY DFF1 IS
PORT(CLK,RST,EN,D: IN STD_LOGIC; Q: OUT STD_LOGIC); END;
ARCHITECTURE bhv OF DFF1 IS
SIGNAL Q1:STD_LOGIC; --ÀàËÆÓÚÔÚоƬÄÚ²¿¶¨ÒåÒ»¸öÊý¾ÝµÄÔÝ´æ½Úµã BEGIN
PROCESS (CLK,Q1,RST,EN) BEGIN
IF RST='1' THEN Q1<='0';
ELSIF CLK'EVENT AND CLK='1' THEN IF EN='1' THEN Q1<=D; END IF; END IF;
END PROCESS;
Q<=Q1; --½«ÄÚ²¿µÄÔÝ´æÊý¾ÝÏò¶Ë¿ÚÊä³ö END bhv;
--½â2£º5-1¡¾5-5¡¿º¬Í¬²½¸´Î»¿ØÖƵÄD´¥·¢Æ÷ LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL; ENTITY DFF1 IS
PORT(CLK,RST,D: IN STD_LOGIC; Q: OUT STD_LOGIC); END;
ARCHITECTURE bhv OF DFF1 IS
SIGNAL Q1:STD_LOGIC; --ÀàËÆÓÚÔÚоƬÄÚ²¿¶¨ÒåÒ»¸öÊý¾ÝµÄÔÝ´æ½Úµã BEGIN
PROCESS(CLK,Q1,RST) BEGIN
IF CLK'EVENT AND CLK='1' THEN
IF RST='1' THEN Q1<='0';ELSE Q1<=D;END IF; END IF; END PROCESS;
Q<=Q1; --½«ÄÚ²¿µÄÔÝ´æÊý¾ÝÏò¶Ë¿ÚÊä³ö END bhv; 5-2 ¾ÙÀý£¨¡¾Àý5-1¡¿£©ËµÃ÷£¬ÎªÊ²Ã´Ê¹ÓÃÌõ¼þÐðÊö²»ÍêÕûµÄÌõ¼þ¾äÄܵ¼Ö²úÉúʱÐòÄ£¿éµÄ×ۺϽá¹û¡£
ÓÉÓÚ²»ÍêÕûÌõ¼þ¾ä¾ßÓжÔÊä³öÐźŲ»×ö´¦Àí(¼´±£³ÖÏÖ×´)µÄÐÐΪ£¬¶øµ¼ÖÂʱÐòµç·×ۺϽá¹û¡£(P121)
--½â£º5-2¡¾Àý5-1¡¿D´¥·¢Æ÷
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL; ENTITY DFF1 IS
PORT(CLK: IN STD_LOGIC; D: IN STD_LOGIC; Q:OUT STD_LOGIC); END;
ARCHITECTURE bhv OF DFF1 IS
SIGNAL Q1:STD_LOGIC; --ÀàËÆÓÚÔÚоƬÄÚ²¿¶¨ÒåÒ»¸öÊý¾ÝµÄÔÝ´æ½Úµã BEGIN
PROCESS(CLK,Q1) BEGIN
IF CLK'EVENT AND CLK='1' --ÉÏÉýÑØ´¥·¢Ëø´æ THEN Q1<=D; END IF; END PROCESS;
Q<=Q1; --½«ÄÚ²¿µÄÔÝ´æÊý¾ÝÏò¶Ë¿ÚÊä³ö END bhv;
5-3 Éè¼ÆÒ»¸ö¾ßÓÐͬ²½ÖÃ1£¬Òì²½Çå0µÄD´¥·¢Æ÷¡£ --5-3 Éè¼ÆÒ»¸ö¾ßÓÐͬ²½ÖÃ1£¬Òì²½Çå0µÄD´¥·¢Æ÷¡£ LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL; ENTITY DFF1 IS
PORT(CLK,RST,SET,D: IN STD_LOGIC; Q: OUT STD_LOGIC); END;
ARCHITECTURE bhv OF DFF1 IS
SIGNAL Q1:STD_LOGIC; --ÀàËÆÓÚÔÚоƬÄÚ²¿¶¨ÒåÒ»¸öÊý¾ÝµÄÔÝ´æ½Úµã BEGIN
PROCESS (CLK,Q1,RST,SET) BEGIN
IF RST='1' THEN Q1<='0';
ELSIF CLK'EVENT AND CLK='1' THEN IF SET='1' THEN Q1<='1'; ELSE Q1<=D; END IF; END IF;
END PROCESS;
Q<=Q1; --½«ÄÚ²¿µÄÔÝ´æÊý¾ÝÏò¶Ë¿ÚÊä³ö END bhv;
5-4 °ÑÀý5-15(Òì²½¸´Î»ºÍͬ²½¼ÓÔØÊ®½øÖƼӷ¨¼ÆÊýÆ÷)¸Äд³ÉÒ»Òì²½Çå0£¬Í¬²½Ê±ÖÓʹÄܺÍÒì²½Êý¾Ý¼ÓÔØÐÍ8λ¶þ½øÖƼӷ¨¼ÆÊýÆ÷¡£
--5-4 Òì²½Çå0£¬Í¬²½Ê±ÖÓʹÄܺÍÒì²½Êý¾Ý¼ÓÔØÐÍ8λ¶þ½øÖƼӷ¨¼ÆÊýÆ÷¡£ LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL; ENTITY CNT10 IS
PORT(CLK,RST,EN,LOAD : IN STD_LOGIC;
DATA : IN STD_LOGIC_VECTOR(3 DOWNTO 0); --4λԤÖÃÊý DOUT : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);--¼ÆÊýÖµÊä³ö COUT : OUT STD_LOGIC); --¼ÆÊý½øÎ»Êä³ö END CNT10;
ARCHITECTURE behav OF CNT10 IS BEGIN
PROCESS(CLK,RST,EN,LOAD)
VARIABLE Q : STD_LOGIC_VECTOR(3 DOWNTO 0); BEGIN
IF RST='0' THEN Q:=(OTHERS =>'0'); --¼ÆÊýÆ÷Òì²½¸´Î» ELSIF LOAD='0' THEN Q:=DATA; --ÔÊÐí¼ÓÔØ
ELSIF CLK'EVENT AND CLK='1' THEN --¼ì²âʱÖÓÉÏÉýÑØ
IF EN='1' THEN --¼ì²âÊÇ·ñÔÊÐí¼ÆÊý»ò¼ÓÔØ£¨Í¬²½Ê¹ÄÜ£© IF Q<9 THEN Q:=Q+1; --ÔÊÐí¼ÆÊý,¼ì²âÊÇ·ñСÓÚ9 ELSE Q:=(OTHERS=>'0'); --´óÓÚµÈÓÚ9ʱ£¬¼ÆÊýÖµÇåÁã END IF; END IF; END IF; IF Q=9 THEN COUT<='1'; --¼ÆÊý´óÓÚ9£¬Êä³ö½øÎ»ÐźŠELSE COUT<='0'; END IF;
DOUT<=Q; --½«¼ÆÊýÖµÏò¶Ë¿ÚÊä³ö END PROCESS; END behav;
5-5 ÊÔ¶ÔϰÌâ5-4µÄÉè¼ÆÉÔ×÷Ð޸쬽«Æä½øÎ»Êä³öCOUTÓëÒì²½¼ÓÔØ¿ØÖÆLOADÁ¬ÔÚÒ»Æð£¬¹¹³ÉÒ»¸ö×Ô¶¯¼ÓÔØÐÍ16(4)λ¶þ½øÖÆÊý¼ÆÊýÆ÷£¬¼´Ò»¸öl6(4)λ¿É¿ØµÄ·ÖƵÆ÷£¬²¢ËµÃ÷¹¤×÷ÔÀí¡£ÉèÊäÈëÆµÂÊfi=4MHz£¬Êä³öƵÂÊf0=(516.5¡À1)Hz(ÔÊÐíÎó²î¡À0.1Hz)£¬Çó16λ¼ÓÔØÊýÖµ¡£
--5-5 ÊÔ¶ÔϰÌâ5-4µÄÉè¼ÆÉÔ×÷Ð޸쬽«Æä½øÎ»Êä³öCOUTÓëÒì²½¼ÓÔØ¿ØÖÆLOADÁ¬ÔÚÒ»Æð£¬ --¹¹³ÉÒ»¸ö×Ô¶¯¼ÓÔØÐÍ16(4)λ¶þ½øÖÆÊý¼ÆÊýÆ÷£¬¼´Ò»¸öl6(4)λ¿É¿ØµÄ·ÖƵÆ÷£¬²¢ËµÃ÷¹¤×÷ÔÀí¡£ --ÉèÊäÈëÆµÂÊfi=4MHz£¬Êä³öƵÂÊf0=(516.5¡À1)Hz(ÔÊÐíÎó²î¡À0.1Hz)£¬Çó16λ¼ÓÔØÊýÖµ¡£
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL; ENTITY CNT10 IS
PORT(CLK,RST,EN : IN STD_LOGIC;
DATA : IN STD_LOGIC_VECTOR(3 DOWNTO 0); --4λԤÖÃÊý DOUT : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);--¼ÆÊýÖµÊä³ö COUT : BUFFER STD_LOGIC); --¼ÆÊý½øÎ»Êä³ö END CNT10;