FPGA 答辩论文 - 图文 下载本文

摘 要

信号发生器作为电子技术领域中最基本的电子仪器,广泛应用于各个领域中。随着电子信息技术的发展,对其性能的要求也越来越高,如要求频率稳定性高、转换速度快,具有调幅、调频、调相等功能。本论文报告为基于FPGA 的DDS 波形发生器,具有一定的实际意义。通过研究直接数字频率合成器(Direct Digital Frequency Synthesis 简称DDS或DDFS)的基本原理,掌握了DDS 的核心相位累加器的功能;分析了FPGA 的性能结构,了解到DA转换电路与FPGA 之间的通信控制功能;结合外围电路,设计了基于FPGA 的DDS 波形发生器。

本系统主要以FPGA芯片EP2C8Q208C8 为核心,辅以必要的模拟电路,在Verilog编写的程序控制下,构成了一个基于直接数字频率合成技术的波形发生器。

关键词:FPGA; DDS;波形发生器;Verilog。

Abstract

Signal generator in the field of electronic technology as the most basic electronic devices, widely used in various fields. With the development of electronic information technology, its performance requirements are also getting higher and higher, such as high-frequency stability requirements, conversion speed, with AM, FM. The topic for the FPGA-based DDS waveform generator, has a practical significance. Through research Direct Digital Synthesis (Direct Digital Frequency Synthesis referred to DDS or DDFS) to the basic principles of the DDS grasp the core of the phase accumulator function of the performance of the FPGA, DA conversion circuit and that communications between the FPGA Control functions in conjunction with the external circuit, the design of the FPGA-based DDS waveform generator.

This system is mainly to FPGA chip EP2C8Q208C8 as the core, supplemented by the necessary analogcircuit, in the preparation of the Verilog programming, constitutes a Based on Direct Digital Synthesis technology wave generator.

Key words: FPGA; DDS; Waveform Generator; Verilog

目录

摘 要................................................................................................................................1 Abstract...............................................................................................................................2 第一章 绪论.....................................................................................................................1

1.1 引言.....................................................................................................................1 1.2 国内外现状.........................................................................................................1

1.2.1 国外信号发生器现状...............................................................................1

1.2.2 国外信号发生器现状................................................................................2 1.3 DDS的优劣势......................................................................................................3

1.3.1 DDS的优点...............................................................................................3 1.3.2 DDS的缺点...............................................................................................3 1.3.3 单芯片DDS介绍......................................................................................4 1.4 本论文主要内容..................................................................................................4 第二章 FPGA工作原理...................................................................................................6 2.1 FPGA 简介...........................................................................................................6

2.1.1 FPGA的发展历程及特性介绍................................................................6 2.1.2 FPGA系统结构和资源............................................................................6 2.1.3 FPGA的设计流程......................................................................................9 2.2 FPGA实现DDS的方法.......................................................................................11 2.2.1 基于IIR滤波器的DDS.............................................................................11 2.2.2 基于查表法(LTU)的DDS....................................................................13 2.2.3 两种实现方法的比较.................................................................................17 第三章 DDS工作原理.....................................................................................................18 3.1 DDS理论可行性....................................................................................................18 3.2 直接数字频率合成基础........................................................................................19 3.3 DDS的频率分析...................................................................................................20 3.4 DDS输出特性.......................................................................................................22 3.4.1 理想情况下的DDS频谱特性.....................................................................22 3.4.2 非理想情况下的DDS频谱特性.................................................................24 3.5 DDS系统输出的杂散信号抑制方法...................................................................25 3.5.1 增加波形存储器的有效容量.......................................................................25 3.5.2 抖动注入技术...............................................................................................25 第四章 系统方案及电路设计.........................................................................................27 4.1 系统设计目标.......................................................................................................27 4.2 主要器件的选择...................................................................................................27 4.2.1 FPGA主芯片的选择....................................................................................27 4.2.2 DAC的选择..................................................................................................28 4.3 系统构成...............................................................................................................29 4.4 FPGA的设计.........................................................................................................29 4.4.1 系统控制模块的设计...................................................................................29 4.4.2 按键消抖模块设计.......................................................................................33 4.4.3 显示模块设计...............................................................................................34 4.4.3.1 频率显示模块的设计............................................................................34 4.4.3.1 电压幅值显示模块的设计....................................................................36 4.4.4 外围接口电路...............................................................................................36

目录

第五章 调试....................................................................................................................37 第六章 性能结果测试及分析........................................................................................37 6.1 测试数据................................................................................................................38 6.2 误差分析................................................................................................................40 6.2.1 幅值量化误差........................................................................................................40 6.2.2 电源噪声................................................................................................................40 6.2.3 后级运放产生的误差............................................................................................40 第七章 总结....................................................................................................................41 致谢....................................................................................................................................42 附录....................................................................................................................................43 附录A (按键消抖程序)................................................................................................43 附录B (频率运算控制模块代码)..........................................................................45 附录C (FPGA核心板原理图)...............................................................................46 附录D (按键指示板电路)......................................................................................48 附录E (显示板电路).............................................................................................48 附录F (DA转换板电路)......................................................................................50 参考文献............................................................................................................................52